My client is a global name in the semiconductor industry and now seeks an experienced Engineer to be part of the pattern development team (Pre Silicon phase testing)
Requirements:
- Assume responsibility for key system modules functional pattern development
- Draft test patterns ( CPU and JTAG) design specification
- Verify developed patterns in RTL/GLS simulation/emulation verification environment
- Liaise with and support test engineers to bring test patterns on ATE testers.
- Develop script to automate verification process and support product engineering team in reliability and failure analysis
Responsibilities:
- Advanced Degree in Electrical/ELectronics Engineering with at least 7 years' experience in functional test pattern development and testing for So
- Stronghold with RTL level waveform-based debugging during pattern development.
- Experience in troubleshooting test pattern issues
- Knowledge about microcontroller system architecture and Protocol knowledge such as Jtag, Gigabit Ethernet, SPI, I2C
- Hands-on experience in Zebu emulation, Cadence Simvision/ Synopsis Verdi, V93K tester platform, Git version control.
- Familiar with Python, TCL, CShell, Perl, C/C++
Please send your resume in WORD format by clicking the apply button below or contact Abhik Damani on +65 6701 1527 for a confidential discussion. Please note that only short-listed candidates will be contacted. CEI Reg. Number R1544061 (Abhik Damani).
